The automotive industry is entering a new phase in the evolution of advanced driver-assistance systems (ADAS) and autonomous driving (AD)—one increasingly defined by generative AI. Today, generative AI is accelerating the shift toward AI-native, end-to-end (E2E) architectures capable of learning driving behavior directly from massive data sets. E2E systems can adapt more effectively to unfamiliar environments, handle greater driving complexity, and improve far more quickly as they process more data.
These developments are changing ADAS/AD economics. It’s no longer just about engineering a better vehicle; competitive advantage is now shifting toward companies that can combine expertise in AI models, semiconductors, cloud infrastructure, large-scale data collection, and the efficient validation of integrated hardware–software systems. The transition is unfolding amid growing consumer interest and rising investment in autonomous driving.
In this report, we look at how consumer attitudes and technological advances are creating market momentum. We then examine the ways in which AI is transforming the ADAS/AD landscape—from E2E software architectures and in-vehicle compute to hyperscale data center requirements and the reconfiguration of the automotive value chain. What’s clear is that autonomous driving is becoming as much an AI infrastructure challenge as an automotive engineering one.
Consumer attitudes and market momentum
Will most cars be fully driverless by 2035? That’s what a majority of Chinese consumers—and about one in four Western consumers—expect, according to the latest McKinsey Center for Future Mobility Consumer Pulse survey. Indeed, ADAS and AD are rapidly moving into the mainstream, and ADAS capabilities are increasingly influencing vehicle purchase decisions, particularly in the premium segment.
Consumers are also open to riding in autonomous vehicles (AVs) that they don’t own, as the fast-growing robo-taxi market shows. Across the globe, consumer openness toward autonomous-mobility services is rising. More than 60 percent of surveyed consumers say they would consider using robo-taxis, with roughly half expecting ride fares to decline in the coming years (Exhibit 1).
Consumers, however, foresee faster progress than industry experts do. Most AV experts surveyed believe Level 2+ systems will dominate the mass market through 2035, while Level 3 and higher systems will likely remain limited to select use cases and geographies during that period.
Continued advances in Level 2+ systems and steady progress toward Level 4 autonomy are projected to fuel sustained growth in the global ADAS software and electronics market, which is on track to expand by approximately 16 percent annually, reaching around $160 billion by 2035. Software and domain control units (DCUs) are expected to account for the largest share of the market (Exhibit 2).
Despite the strong momentum, scaling autonomous driving remains expensive and technically challenging. Software development, safety validation, and large-scale data collection are major cost drivers. The shift toward E2E AI architectures is also increasing requirements for compute infrastructure, simulation capabilities, and high-performance semiconductors. In an informal survey of more than 40 industry leaders, conducted in November 2025, respondents cited the following as the top three ADAS challenges: safety assurance (23 percent), high computational demands for in-vehicle inference (14 percent), and regulatory and legal uncertainty (14 percent).1
The strategic shift: From rule-based to end-to-end systems
For more than a decade, ADAS and AD progress was driven largely by rule-based software architectures, with engineers codifying thousands of explicit instructions to govern how vehicles should react to specific scenarios. This approach enabled many of today’s safety and convenience features—from automatic emergency braking to adaptive cruise control—and laid the foundation for higher levels of autonomy. Today, the industry is undergoing a profound architectural transition.
Why the architecture is changing
Two broad technological and strategic forces are accelerating the transition toward E2E architectures.
First, generative AI has significantly accelerated the progress of ADAS and AD technologies. Whereas conventional systems rely on explicitly programmed rules or selective machine learning (such as for road sign detection), E2E architectures learn driving behavior directly from large-scale data sets and can therefore generalize more effectively to unfamiliar situations, exhibiting driving behavior that appears more natural and humanlike.
Second, efforts to advance Level 4 capabilities are spurring greater collaboration across the ecosystem. Partnerships among semiconductor companies, OEMs, and mobility operators are becoming more common. In many cases, deployment follows a phased model: fleets of data collection vehicles first gather real-world driving information, then human-supervised deployments validate system performance in constrained environments, and finally, companies introduce fully driverless operations. These collaborations are reshaping competitive dynamics and speeding up technological iteration.
Three approaches to ADAS and autonomy
Three main architectural approaches are taking shape in ADAS (Exhibit 3). They typically combine multimodal vision models with reinforcement learning or imitation-learning techniques. Some use a single model to process perception, planning, and control simultaneously; in others, multiple models are trained jointly.
Two of these architectures follow conventional, rule-based systems common to first-generation AV technologies:
- Traditional ADAS (AV 1.0) are built around a modular pipeline that separates perception, planning, and control into distinct software layers. The majority of the code is hand-coded, with explicit “if-then” rules for specific driving scenarios (for example, “If a pedestrian is detected within ten meters, apply the brakes”) and only limited use of AI (such as machine learning) within the layers.
- Hybrid architectures combine end-to-end learning with rule-based safeguards, typically relying on AI—including vision-language-action (VLA) models—to handle the primary driving task while additional rules monitor outputs and enforce safety constraints.
The third architecture, E2E, is considered a second-generation AV technology, or AV 2.0. It uses transformer-based models trained on internet-scale and vehicle-generated data sets to learn complex driving behaviors and generalize across variable environments.
Among companies pursuing E2E autonomy, there’s no single consensus on design. One major design philosophy involves modular systems, which combine the strengths of AI learning with the transparency of modular engineering. Separate pretrained models handle functions such as perception and planning, but the models are trained jointly within an end-to-end optimization framework. This structure offers several advantages. Intermediate outputs remain visible and can be validated independently, making debugging and safety analysis more manageable. Developers can also use closed-loop simulation techniques—particularly for the planning layer—to improve efficiency. However, the modular structure can introduce information loss at the interfaces between components. It also offers a slightly lower degree of generalization in complex real-world scenarios.
A second design philosophy relies on monolithic architectures that use a single model to handle perception and planning simultaneously and, in some cases, even vehicle control. Proponents argue that eliminating interfaces between modules reduces information loss and enables stronger generalization. The trade-off is much higher technical complexity. Monolithic systems require enormous quantities of training data, extensive compute resources, and highly sophisticated simulation environments. Validation also becomes substantially more difficult because the model’s decision-making process is often not directly observable.
There is growing industry consensus that E2E architectures can outperform traditional systems in highly variable driving environments. They can adapt to situations that engineers may never have explicitly anticipated—a capability that is especially important in urban environments, where driving conditions are dynamic and ambiguous. But these advantages introduce a major challenge: explainability. Unlike modular rule-based systems, end-to-end models often function as “black boxes.” Engineers may observe what the system does without fully understanding why it made a particular decision. This complicates safety validation, debugging, and regulatory approval.
These limitations are shaping expectations for how quickly different levels of autonomy will scale. Many industry players expect Level 2+ systems to scale faster than fully autonomous vehicles. In Level 2+ applications, the human driver remains responsible for supervision, reducing the burden of proving full system safety. Scaling Level 3 and Level 4 deployments with pure E2E algorithms will likely require breakthroughs in several areas simultaneously: more data-efficient AI models, large-scale simulation capabilities for validating rare edge cases, and broader regulatory acceptance. Hybrid approaches, which add supervisory safety layers to E2E algorithms, could accelerate the adoption of E2E models in Level 3 and Level 4 vehicles.
At the same time, the shift toward AI-native E2E architectures is triggering an explosion in compute demand across the automotive industry. Semiconductors and in-vehicle computing platforms are emerging as critical competitive differentiators.
Computing: A new era of in-car requirements
The automotive semiconductor market is evolving rapidly. Key trends include the adoption of graphics processing units (GPUs) and neural processing units (NPUs) for AI workloads, rising compute-performance requirements for infotainment and ADAS applications, and emerging architectures such as fusion system-on-chips (SoCs) and chiplets that can efficiently run multiple applications with different safety requirements—such as infotainment and ADAS—on a single chip.
The ADAS/AD processing semiconductor market is expected to grow from approximately $5.6 billion in 2025 to more than $46 billion by 2035—equivalent to roughly 24 percent annual growth (Exhibit 4). This growth far outpaces the broader automotive semiconductor market. ADAS/AD processing semiconductors are projected to increase their share of automotive semiconductor value from less than 6 percent in 2025 to 22 percent by 2035. Growth is expected across all regions, but Greater China is likely to be the largest market by 2035.
This rapid growth reflects a broader shift in how AD systems are designed and deployed. As the industry transitions from rule-based ADAS to E2E AI systems, in-vehicle compute requirements are rising sharply. Future systems must process vast streams of multimodal sensor data in real time while continuously running large AI models under strict latency and safety constraints. Raw compute performance alone is no longer enough; NPUs, memory bandwidth, and advanced packaging technologies are now becoming decisive strategic factors.
The central role of NPUs and memory bandwidth
Three structural trends are driving the next generation of automotive compute. First, rising ADAS levels and the growing use of high-resolution cameras, radar, and lidar sensors are dramatically increasing compute demand. Higher autonomy levels require systems to process more data, interpret more complex environments, and execute more sophisticated planning algorithms—all within milliseconds.
Second, the move toward E2E architectures is fundamentally changing the internal composition of automotive SoCs. In earlier ADAS generations, GPUs often served as the primary acceleration engine for perception workloads. In E2E architectures, however, NPUs are becoming the dominant compute element because they are optimized for AI inference. Central processing units (CPUs) continue to manage safety-critical functions and overall system orchestration, particularly for systems requiring Automotive Safety Integrity Level (ASIL) compliance. GPUs and digital signal processors (DSPs) transition toward supporting roles, handling tasks such as pre- and postprocessing, visualization, and compatibility with AI-training ecosystems.
Third, the industry is moving toward centralized compute platforms capable of simultaneously handling ADAS, infotainment, and body-control functions. These architectures reduce wiring complexity, improve software upgradability, simplify over-the-air updates, and create greater flexibility for deploying AI-driven features over the vehicle life cycle. But they also introduce technical challenges by bringing mixed-criticality workloads—with vastly different latency, reliability, and safety requirements—onto a single platform. Scalable architectures and advanced interconnect technologies are therefore becoming more important.
Why today’s baseline struggles to scale
Current ADAS SoCs typically deliver roughly 100 to 400 (INT8) tera operations per second (TOPS). These platforms already combine multiple heterogeneous compute blocks—including CPUs, GPUs, NPUs, and DSPs—but the architectural balance is shifting as AI workloads become more demanding. Compared with earlier generations, newer chips dedicate a larger share of silicon area to NPUs rather than GPUs, reflecting the increasing dominance of AI inference in E2E systems. CPUs still handle safety-critical functions, system orchestration, and redundancy.
Yet raw compute performance is no longer the primary constraint for next-generation ADAS systems. As E2E architectures process larger AI models and increasingly rich streams of sensor data, the industry is confronting a new challenge: efficiently moving large volumes of data through the system in real time.
The real bottleneck: Memory bandwidth. One of the biggest shifts in E2E ADAS architectures is that systems become fundamentally memory bound rather than compute bound because of large parameter counts, high-resolution sensor streams, and massive intermediate activation layers. Memory bandwidth—measured in gigabytes per second—increasingly defines feasibility. High-bandwidth LPDDR DRAM and larger on-chip SRAM caches are therefore becoming essential design parameters. Vehicles also need more nonvolatile memory to store larger model weights and support frequent software updates.
These requirements have major implications for cost, thermal design, and packaging strategy. Technologies such as high-bandwidth memory and advanced packaging can help address bandwidth constraints, but they also increase cost and system complexity. Many industry players now view memory architecture—not peak TOPS—as the main bottleneck in scaling E2E autonomy.
Memory is becoming more important beyond the vehicle as well. AI demand is triggering a memory chip shortage. Hyperscalers are buying memory at an increased pace, with servers accounting for more than 50 percent of DRAM demand in 2025, according to research and advisory group Omdia. Global DRAM sales grew at a CAGR of roughly 70 percent from 2023 to 2025.
Latency and determinism. Beyond raw throughput, E2E systems impose another critical requirement: deterministic latency. ADAS and AD systems rely on real-time control loops in which sensor inputs, planning decisions, and vehicle-control outputs must happen within tightly bounded and highly predictable time windows. Variability in execution timing can directly affect safety.
This requirement is elevating the importance of on-chip interconnects and low-latency communication fabrics. In particular, chip-to-chip latency can pose a challenge for E2E loops. While distributed architectures offer flexibility and scalability, they can introduce synchronization delays and unpredictable behaviors that are difficult to validate in safety-critical systems.
As a result, deterministic execution and bounded latency are becoming key design constraints for next-generation E2E autonomy platforms. In many cases, these requirements favor highly integrated compute architectures that minimize communication overhead and improve timing predictability over more disaggregated designs.
Packaging as a strategic differentiator
In addition to reshaping processor architectures, the new requirements are influencing the underlying semiconductor packaging technologies used to integrate compute, memory, and connectivity at scale. Three approaches are possible for automotive AI workloads:
- Monolithic SoCs remain the preferred architecture for many real-time automotive workloads because they provide the lowest latency and simplify safety validation. They also enable a unified safety case and reduce verification and integration complexity.
- System-in-package architectures are emerging as an intermediate solution, combining multiple dies within a single package. For many automotive applications, SiP offers an attractive balance between performance, time to market, validation complexity, and cost.
- Chiplets are widely viewed as a potentially transformative solution for the post-2030 period. By decomposing large processors into smaller reusable dies connected through advanced interconnects, chiplets could significantly improve scalability, modularity, and cost efficiency. They may also enable companies to update specific compute functions without redesigning entire SoCs. However, for safety-critical automotive systems, chiplets introduce substantial verification and validation complexity, particularly around ASIL decomposition, multidie synchronization, and debugging. Many industry experts therefore don’t expect chiplets to become a viable option for high-performance E2E ADAS until interconnect technologies, software tooling, and automotive safety validation frameworks mature further.
The hyperscale shift: Why autonomous driving is becoming an AI infrastructure challenge
Beyond the vehicle itself, AI-native E2E systems require enormous data center capacity. Whereas in earlier generations of ADAS, modular architectures separated perception, localization, prediction, and planning into discrete software stacks, E2E architectures use unified neural networks to map raw sensor inputs directly to driving decisions and vehicle controls.
As compute demands rise across every stage of the development life cycle, ADAS/AD economics are starting to look more like those of hyperscale AI platforms than those of traditional automotive engineering programs.
The forces driving the compute explosion
The compute demands of AI-native E2E systems are being driven by three structural forces.
- Model complexity and memory intensity. E2E systems rely on increasingly large and sophisticated AI models. Transformer architectures, multimodal foundation models, and emerging VLA systems must process huge volumes of high-dimensional sensor data in real time while simultaneously interpreting, planning, and controlling vehicle behavior. High-resolution camera feeds, 3D occupancy networks, and multibillion-parameter neural networks require massive GPU clusters for training, alongside high-TOPS centralized vehicle computers, extremely high memory bandwidth, and advanced tensor-parallel architectures.
- The scale of training data. E2E models require developers to collect, store, label, and process vast quantities of structured and unstructured driving data. Millions of hours of real-world driving data are needed to support imitation learning, reinforcement learning, edge-case discovery, and continuous model refinement.
- Simulation-heavy validation. E2E models behave somewhat like black boxes compared with rule-based approaches. Companies must run immense volumes of high-fidelity, closed-loop simulation to generate synthetic edge cases, evaluate failure scenarios, refine reward functions, and continuously retrain models.
Not every automotive player will participate equally in this race for compute. A clear strategic divide is forming between “compute light” and “compute heavy” operating models.
Many traditional OEMs are pursuing a compute-light model, integrating off-the-shelf tech stacks from suppliers. Under this approach, the OEM relies on the supplier for the underlying foundation model and performs only limited vehicle-specific fine-tuning internally, keeping internal compute requirements comparatively modest.
At the other end of the spectrum, robo-taxi operators and highly vertically integrated OEMs are pursuing compute-heavy strategies centered on developing proprietary E2E driving models from scratch. These players require enormous dedicated compute infrastructure. Some leading players are scaling toward total AI training capacity approaching 90,000 H100-equivalent GPUs.
These infrastructure requirements are expected to rise sharply as next-generation AI accelerators enter the market. Greater compute capacity will enable the training of increasingly complex VLA models and large-scale E2E neural networks required for Level 4 autonomy.
Choosing an AI infrastructure model
In deciding where infrastructure should reside—whether in the cloud, in an on-premises data center, or both—autonomous-driving players typically weigh four factors: total cost, data sovereignty (ensuring that high-fidelity sensor data, proprietary foundation models, and sensitive intellectual property [IP] remain fully protected), elasticity and time to capacity (how fast engineering teams can access highly sought-after GPU clusters for burst training workloads), and compliance with global regulations and standards.
The cloud model: Speed and flexibility. A pure public-cloud approach offers the fastest scaling and the most flexibility. Developers can rapidly access large GPU clusters without worrying about hardware depreciation. This elasticity is especially valuable for burst workloads such as large-scale model training or intensive simulation campaigns. For smaller players and traditional OEMs with relatively modest compute needs, the cloud provides a practical path to AI capability without massive capital expenditure.
Yet cloud economics become challenging at scale. As AI demand surges globally, GPU pricing volatility, vendor lock-in risks, and hyperscaler dependency are becoming strategic concerns. Some cloud-native teams are finding it more economical to lease or build dedicated infrastructure rather than pay hyperscaler fees.
The on-premises model: Control and predictability. Building a private, on-premises data center provides full data sovereignty—a particularly important consideration for highly regulated defense and automotive applications. It also offers more predictable long-term economics for continuous workloads such as inference and simulation.
The trade-off is that private infrastructure requires significant upfront capital expenditure. It also sacrifices elasticity: A company cannot, for example, instantly spin up an extra 10,000 GPUs for a new training run. Furthermore, some industry experts note that managing an on-premises architecture requires deep internal talent, and the data controls natively built into modern cloud environments are sometimes much stronger than what a traditional enterprise can maintain in its own data centers.
The hybrid model: The emerging dominant architecture. For leading E2E players, a hybrid model is the preferred long-term architecture. Under this approach, companies retain sensitive data, proprietary foundation models, and steady-state workloads on private infrastructure while using the public cloud selectively for large-scale model training runs or the simulation of millions of synthetic edge cases.
This model balances several competing priorities simultaneously: data control and compliance, long-term cost optimization, elastic access to compute, and faster experimentation cycles. Hybrid architectures are becoming especially attractive for robo-taxi operators and vertically integrated OEMs competing at the ADAS/AD frontier.
How to manage costs across E2E data centers
In some AI data centers, GPUs account for up to 70 percent of total server costs. Without aggressive optimization, continuous model training could become economically unsustainable. Leading players can attack the problem across three dimensions: software, infrastructure, and procurement.
Invest in algorithmic efficiency. The fastest path to lower costs is often improving the underlying training code and model architecture so that less hardware is required to achieve the same result. Developers are adopting mixed-precision training approaches—combining formats such as FP32, FP16, FP8, and, where appropriate, even FP4—to reduce memory consumption and accelerate training without materially compromising model quality. Structured sparsity techniques also allow models to perform fewer computations while maintaining performance.
In addition, companies are eliminating bottlenecks in data-loading pipelines and training orchestration. In many AI environments, GPUs sit idle while waiting for data to load. Streamlining data-loading pipelines can therefore generate substantial effective capacity gains.
Optimize infrastructure. Because hyperscale AI workloads are pushing data center operating expenditures higher, optimizing infrastructure efficiency is critical. Companies are doing so by maximizing GPU utilization and investing in data proximity.
Industry players are reducing idle time and boot time through techniques such as dynamic voltage and frequency scaling and the automated shutdown of idle servers. Data locality is also becoming a major strategic consideration, since transporting petabytes of uncompressed sensor data across networks incurs high bandwidth costs and latency challenges. Many players are keeping training workloads physically close to large data sets. Edge processing within the vehicle itself is also becoming more important, reducing the volume of raw data that must be transmitted back to centralized infrastructure.
Identify the most suitable sourcing strategy. Finally, companies must take a strategic approach to hardware procurement and cloud leasing, balancing up-front capital expenditure with long-term operating expenditure.
Concerns around cost, availability, and vendor concentration in AI infrastructure are boosting interest in alternatives such as AMD GPUs, Google TPUs, AWS Trainium, and custom accelerators. Over time, some specialized workloads may migrate toward application-specific integrated circuits or field-programmable gate arrays, particularly as algorithms mature and stabilize.
Capacity procurement strategies are also evolving. AI training workloads are highly variable, making it costly to rely entirely on on-demand public-cloud instances. Many companies are therefore moving toward balanced portfolios that combine reserved long-term capacity for steady-state training and simulation with on-demand or spot instances (often provided via hyperscalers) for temporary surge workloads and large training runs.
A reconfiguration of the value chain
Today’s E2E neural networks and VLA models are so computationally demanding that hardware and software are often co-developed. Achieving the ultra-low latency, high bandwidth, and deterministic safety required for Level 3 and Level 4 autonomy is extremely difficult using fragmented, off-the-shelf components. Leading players are therefore pursuing tightly integrated hardware–software codesign approaches or developing the software specifically for a dedicated chip.
Yet, despite these near-term benefits, most industry experts believe the market’s long-term direction points toward a decoupling of hardware and software. Today, however, there is no clear trend toward one scenario (Exhibit 5).
Even though many SoC suppliers currently offer integrated stacks in which hardware and software are delivered as a package, they themselves expect greater separation over the longer term to improve flexibility and safety validation. OEMs and tier-one suppliers emphasize the need for independent software layers—such as perception, planning, and control—that can operate across multiple SoCs. Semiconductor companies are simultaneously investing in open interfaces, middleware abstraction, and standardized software frameworks (such as POSIX-based systems and AUTOSAR Adaptive), all of which point structurally toward greater hardware–software separation over time.
A smaller group of experts argues that tightly integrated E2E codesign will remain necessary for high-performance autonomy, particularly in safety-critical functions where latency and optimization requirements are most extreme. However, even many advocates of deep integration view it as a transitional phase that will last only until standards and compute architectures mature.
A third potential scenario is a modular “mix and match” ecosystem, in which best-of-breed software modules from different providers could run on standardized hardware platforms. One company might provide perception software, another planning software, and another simulation or control functionality, all integrated through common middleware layers. However, such a model still presupposes a certain degree of hardware–software separation and standardization.
One implication of the E2E transition is that semiconductor selection is shifting downstream. Automakers are increasingly taking a software-first approach: They start by selecting an ADAS software partner and establishing data collection and annotation strategies. Semiconductor selection then follows.
As E2E architectures become more complex, collaboration across the value chain is intensifying, and the nature of supplier relationships is evolving. OEMs, tier-one suppliers, semiconductor firms, hyperscalers, and AI-native technology companies are forming joint development programs. In many cases, OEMs contribute vehicle platforms and proprietary driving data; tier-one suppliers provide system integration and validation expertise; and AI platform companies contribute foundation models, training infrastructure, and simulation capabilities. Given the high costs of data collection, model training, safety validation, and high-performance chip development—especially for systems operating in urban environments—we believe that only a few players in each layer of the technology stack will successfully bring these systems to market.
At the same time, the ecosystem is opening to new entrants. The rise of E2E perception-to-control models creates opportunities for AI-native start-ups, robotics companies, and cloud players to enter the automotive value chain as providers of foundation driving models or training infrastructure.
The E2E transition is also accelerating vertical integration among automotive OEMs themselves. Rather than relying on off-the-shelf semiconductors and supplier-developed ADAS software, OEMs are codeveloping custom AI silicon together with chip designers, IP providers, and foundries while also developing their own ADAS/AD software. This reflects a broader strategic shift toward software-defined vehicles, in which hardware follows the requirements of the AI model.
Semiconductor companies, for their part, are expanding upward into software development. Leading SoC providers are offering integrated software stacks that include software development kits, middleware, and safety runtimes. This evolution positions semiconductor firms not simply as component vendors but as end-to-end platform providers.
Autonomous-driving technologies have the potential to make roads safer, lower transportation costs, expand access to mobility, and fundamentally change how people and goods move. The next era of autonomy will be shaped as much by breakthroughs in AI, compute, semiconductors, and hyperscale infrastructure as by the vehicles themselves. As generative AI accelerates the shift toward AI-native, end-to-end systems, the race for autonomous-driving leadership will increasingly depend on who can build the industry’s most powerful AI ecosystem. Companies that successfully combine automotive expertise with distinctive capabilities in software, data, and compute may ultimately define the future of mobility.
